M | Blarney.Core.Module, Blarney.Core, Blarney |
magenta | Blarney.Misc.ANSIEscapeSequences |
makeBoundary | Blarney.Core.Interface, Blarney.Core, Blarney |
makeBoundaryWithClockAndReset | Blarney.Core.Interface, Blarney.Core, Blarney |
makeBoundaryWithInfo | Blarney.Core.Interface, Blarney.Core, Blarney |
makeBypassQueue | Blarney.Queue |
makeConnection | Blarney.Connectable |
makeDReg | |
1 (Function) | Blarney.Core.RTL |
2 (Function) | Blarney.Core.Module, Blarney.Core, Blarney |
makeDualRAM | Blarney.Core.RAM, Blarney.Core, Blarney |
makeDualRAMBE | Blarney.Core.RAM, Blarney.Core, Blarney |
makeDualRAMBECore | Blarney.Core.RAM, Blarney.Core, Blarney |
makeDualRAMCore | Blarney.Core.RAM, Blarney.Core, Blarney |
makeDualRAMForward | Blarney.Core.RAM, Blarney.Core, Blarney |
makeDualRAMForwardBE | Blarney.Core.RAM, Blarney.Core, Blarney |
makeDualRAMForwardBECore | Blarney.Core.RAM, Blarney.Core, Blarney |
makeDualRAMForwardInit | Blarney.Core.RAM, Blarney.Core, Blarney |
makeDualRAMForwardInitBE | Blarney.Core.RAM, Blarney.Core, Blarney |
makeDualRAMInit | Blarney.Core.RAM, Blarney.Core, Blarney |
makeDualRAMInitBE | Blarney.Core.RAM, Blarney.Core, Blarney |
makeFairExchange | Blarney.Interconnect |
makeFairExchangeWithBroadcast | Blarney.Interconnect |
makeFairMerger | Blarney.Interconnect |
makeFieldSelector | Blarney.BitScan |
makeGenericFairMergeTwo | Blarney.Interconnect |
makeInst | Blarney.Core.Interface, Blarney.Core, Blarney |
makeInstance | Blarney.Core.Interface, Blarney.Core, Blarney |
makeInstanceWithInfo | Blarney.Core.Interface, Blarney.Core, Blarney |
makeMod | Blarney.Core.Interface, Blarney.Core, Blarney |
makeModule | Blarney.Core.Interface, Blarney.Core, Blarney |
makeNullSink | Blarney.SourceSink |
makeNullSource | Blarney.SourceSink |
makePipelineQueue | Blarney.Queue |
makePrim | Blarney.Core.BV |
makePrim0 | Blarney.Core.BV |
makePrim1 | Blarney.Core.BV |
makePulseReg | Blarney.PulseReg |
makePulseWire | Blarney.PulseWire |
makeQuadRAM | Blarney.QuadPortRAM |
makeQuadRAMCore | Blarney.QuadPortRAM |
makeQuadRAMInit | Blarney.QuadPortRAM |
makeQueue | Blarney.Queue |
makeRAM | Blarney.Core.RAM, Blarney.Core, Blarney |
makeRAMBE | Blarney.Core.RAM, Blarney.Core, Blarney |
makeRAMBECore | Blarney.Core.RAM, Blarney.Core, Blarney |
makeRAMCore | Blarney.Core.RAM, Blarney.Core, Blarney |
makeRAMInit | Blarney.Core.RAM, Blarney.Core, Blarney |
makeRAMInitBE | Blarney.Core.RAM, Blarney.Core, Blarney |
makeReg | |
1 (Function) | Blarney.Core.RTL |
2 (Function) | Blarney.Core.Module, Blarney.Core, Blarney |
makeRegFile | |
1 (Function) | Blarney.Core.RTL |
2 (Function) | Blarney.Core.Module, Blarney.Core, Blarney |
makeRegFileInit | |
1 (Function) | Blarney.Core.RTL |
2 (Function) | Blarney.Core.Module, Blarney.Core, Blarney |
makeRegU | |
1 (Function) | Blarney.Core.RTL |
2 (Function) | Blarney.Core.Module, Blarney.Core, Blarney |
makeShiftQueue | Blarney.Queue |
makeShiftQueueCore | Blarney.Queue |
makeShuffleExchange | Blarney.Interconnect |
makeSinkBuffer | Blarney.Queue |
makeSizedQueue | Blarney.Queue |
makeSizedQueueConfig | Blarney.Queue |
makeSizedQueueCore | Blarney.Queue |
makeSizedStack | Blarney.Stack |
makeTrueDualRAM | Blarney.Core.RAM, Blarney.Core, Blarney |
makeTrueDualRAMBE | Blarney.Core.RAM, Blarney.Core, Blarney |
makeTrueDualRAMBECore | Blarney.Core.RAM, Blarney.Core, Blarney |
makeTrueDualRAMCore | Blarney.Core.RAM, Blarney.Core, Blarney |
makeTrueDualRAMInit | Blarney.Core.RAM, Blarney.Core, Blarney |
makeTrueDualRAMInitBE | Blarney.Core.RAM, Blarney.Core, Blarney |
makeTwoWayBroadcast | Blarney.Interconnect |
makeWire | |
1 (Function) | Blarney.Core.RTL |
2 (Function) | Blarney.Core.Module, Blarney.Core, Blarney |
makeWireU | |
1 (Function) | Blarney.Core.RTL |
2 (Function) | Blarney.Core.Module, Blarney.Core, Blarney |
map | |
1 (Function) | Blarney.Prelude, Blarney |
2 (Function) | Blarney.Core.JList |
3 (Function) | Blarney.Vector |
mapAndUnzipM | Blarney.Prelude, Blarney |
mapM | |
1 (Function) | Blarney.Prelude, Blarney |
2 (Function) | Blarney.Core.JList |
3 (Function) | Blarney.Vector |
mapM_ | |
1 (Function) | Blarney.Prelude, Blarney |
2 (Function) | Blarney.Vector |
mappend | Blarney.Prelude, Blarney |
mapSink | Blarney.SourceSink |
mapSource | Blarney.SourceSink |
match | |
1 (Function) | Blarney.BitScan |
2 (Function) | Blarney.BitPat |
matchBind | Blarney.Backend.SMT.Utils |
matchDefault | Blarney.BitScan |
matchMap | Blarney.BitScan |
MatchOpts | |
1 (Type/Class) | Blarney.BitScan |
2 (Data Constructor) | Blarney.BitScan |
matchOpts | Blarney.BitScan |
matchSel | Blarney.BitScan |
Max | Blarney.TypeFamilies |
max | Blarney.Prelude, Blarney |
maxBound | Blarney.Prelude, Blarney |
maximum | Blarney.Prelude, Blarney |
Maybe | Blarney.Prelude, Blarney |
maybe | Blarney.Prelude, Blarney |
mconcat | Blarney.Prelude, Blarney |
mempty | Blarney.Prelude, Blarney |
mergeChain | Blarney.Interconnect |
MergeStrategy | Blarney.Core.Prim, Blarney.Netlist.Passes.Utils, Blarney.Netlist.Passes, Blarney.Netlist, Blarney |
mergeTree | Blarney.Interconnect |
mergeTwo | Blarney.Interconnect |
MergeWrites | Blarney.Core.Prim, Blarney.Netlist.Passes.Utils, Blarney.Netlist.Passes, Blarney.Netlist, Blarney |
mergeWrites | Blarney.Core.Common, Blarney.Core, Blarney |
mergeWritesBit | Blarney.Core.Bit, Blarney.Core, Blarney |
mergeWritesBV | Blarney.Core.BV |
Method | Blarney.Core.Interface, Blarney.Core, Blarney |
mfilter | Blarney.Prelude, Blarney |
mfix | Blarney.Prelude, Blarney |
Min | Blarney.TypeFamilies |
min | Blarney.Prelude, Blarney |
minBound | Blarney.Prelude, Blarney |
minimum | Blarney.Prelude, Blarney |
mkListX | Blarney.Backend.SMT.BasicDefinitions |
mkNLDatatype | Blarney.Backend.SMT.NetlistUtils |
MNetlist | Blarney.Netlist.Passes.Types, Blarney.Netlist.Passes, Blarney.Netlist, Blarney |
MNetlistPass | Blarney.Netlist.Passes.Types, Blarney.Netlist.Passes, Blarney.Netlist, Blarney |
MNetlistRef | Blarney.Netlist.Passes.Types, Blarney.Netlist.Passes, Blarney.Netlist, Blarney |
Mod | |
1 (Type/Class) | Blarney.Prelude, Blarney |
2 (Data Constructor) | Blarney.Core.Prim, Blarney.Netlist.Passes.Utils, Blarney.Netlist.Passes, Blarney.Netlist, Blarney |
mod | Blarney.Prelude, Blarney |
modBV | Blarney.Core.BV |
Modular | Blarney.Core.Interface, Blarney.Core, Blarney |
Module | Blarney.Core.Module, Blarney.Core, Blarney |
Monad | Blarney.Prelude, Blarney |
MonadFail | Blarney.Prelude, Blarney |
MonadFix | Blarney.Prelude, Blarney |
MonadPlus | Blarney.Prelude, Blarney |
Monoid | Blarney.Prelude, Blarney |
mplus | Blarney.Prelude, Blarney |
MStratOr | Blarney.Core.Prim, Blarney.Netlist.Passes.Utils, Blarney.Netlist.Passes, Blarney.Netlist, Blarney |
msum | Blarney.Prelude, Blarney |
Mul | Blarney.Core.Prim, Blarney.Netlist.Passes.Utils, Blarney.Netlist.Passes, Blarney.Netlist, Blarney |
mul | Blarney.Core.Bit, Blarney.Core, Blarney |
mulBV | Blarney.Core.BV |
Mux | Blarney.Core.Prim, Blarney.Netlist.Passes.Utils, Blarney.Netlist.Passes, Blarney.Netlist, Blarney |
mux | Blarney.Core.Bit, Blarney.Core, Blarney |
muxBV | Blarney.Core.BV |
mzero | Blarney.Prelude, Blarney |